Category: Digital Electronics


In this tutorial we are going to learn about WHY USE PULL UP & PULL DOWN RESISTOR ?

As per showing image of digital system level 1 or 0, these 1 or 0 is either input & output is determined by logic level.

The logic level is nothing but the voltage range which decides how an input or output in a digital circuit interpreted either as a 0 or 1.

Here is many types of logic families .

  1. TTL
  2. CMOS
  3. DTL
  4. RTL
  5. ECL

Each of the logic families are operate at different voltage level as per below image .

Please see the below image of TTL logic family operation .

For a TTL Logic +5 VCC

5- 2V – “1”

0- 0.8V – “0”

0.9- 1.9V – “X”

In TTL logic family Input voltage range for logic “1” must be operated voltage range is 2V to 5V .

Input voltage range for for logic “o” must be operated voltage range is 0 to 0.8 V .

Input voltage range for for logic “Indeterminate” must be operated voltage range is 0.8V to 2V .


In this tutorial we are going to learn about WHAT IS PULL UP & PULL DOWN RESISTOR ?

These resistor that are use in digital circuit to pull the voltage level & digital input equal to the VCC or to the GND.

As per showing below image for pull up resistor . R1 & R2 is pull up resistor to the pull UP the voltage & input pin nearly to the VCC .

As per showing below image for pull down resistor . R1 & R2 is pull down resistor to the pull down the voltage & input pin nearly to the GND or 0 . Hence input pin connect to GND .

What is an FR4 Board?

In this tutorial we are going to learn about What is an FR4 Board?

The most commonly used insulating base material for PCB’s. FR4 is made from woven glass fibers which are bonded together with an epoxy. The board is cured using a combination of temperature & pressure which causes the glass fibers to melt & bond together, thereby giving the board strength & rigidity. The first 2 characters stand for “Flame Retardant”. FR4 is technically a form of fiberglass, & some people do refer to these composites as fiberglass boards/fiberglass substrates, but not often.


In this tutorial we are going to learn about WHAT IS REFLECTION IN PCB DESIGN  ?

A reflection on a TM line is an echo. A portion of the signal power (V & I) transmitted down the line goes into the load, & a portion is reflected. Reflections are prevented if the load & the line have the same impedance. Reflections are observed when impedance discontinuities exist in the TM line. The discontinuities are:

1. Lack of termination

2. Improperly matched termination circuits.

3. Change in trace width

4. Vias between routing layers

5. T-tubs, branched or bifurcated traces

6. Changes in impedance of the trace

7. Varying load and logic families

8. Connector transitions

9. Large power plane discontinuities.



High frequency analogue signals

· Keep HF trace lengths as short as possible to reduce emitted radiation & pick up points.

· Route HF traces away from sensitive signal lines to avoid cross coupling. Use GND ‘guard’ traces to Provide screening for reducing HF radiation.

· Avoid using sharp corners-an important factor at RF, since 90° corners in traces act as points of high Electrical field strength & constitute an impedance discontinuity & hence a possible source of radiation.

This is generally only applicable when the frequency is in excess of 100MHz.

. If possible, route traces away from the microprocessor instead of underneath it.

. keep clock chips or clock lines away from the edges of the board.

. Place the clock circuit in the center of the board or near the connector if the clock goes off the board.

High frequency Digital signals

· Use capacitance effects of guard traces to increase logic rise & fall times & hence reduce radiatedBandwidth if possible.

· Try to avoid using sharp corners, to reduce possible radiation.

· Keep HF trace lengths like clock lines & busses as short as possible to reduce emitted radiation.

· Route High Frequency digital lines away from sensitive analog signal lines to avoid cross coupling & noise on analog lines. Keeping Noise Close to the Chip noise of the clock errors when the pin is static. Noise on the pins is coupled internal to the device through many paths that can change according to the pin function changes. Like that  the input pin in a keyboard scan has capacitive coupled noise from both the substrate & the PWR rails. Also, because it is hi-z, any ambient fields couple efficiently. If the key is pushed, the pin has a new set of noise sources because the signal line’s impedance has changed. Thus, it is difficult to effectively develop a matrix of all possibilities; therefore, the following is recommended:

• Put a 50 –100- W resistor in series with every o/p pin & 35W–50W resistor on every i/p pin. If the Hardware design calls for higher series resistance, use that value. Higher resistances are better for o/ps, but usually don’t improve characteristics of inputs. Put the resistor as close as possible to the microcomputer, overlapping the microcomputer GND if possible.

• Bypass any pin on the microcomputer to GND using a 1000-pF capacitor, provided the edge rate Used for the signal line is not faster than 100 ns. On o/ps & pins that the system uses for both I/O, GND for the capacitor should be the microcomputer GND. The second end of the capacitor should be close to the receiver side, not the microcomputer side, of the series resistor.

• When pins used for input only, place the capacitor inside, on the microcomputer side, of the resistor to reduce the loop area. Then, HF originating in the microcomputer on the pin see less impedance to GND through the capacitor than through the resistor.

• Reset & interrupt are special functions, thus care must be taken not to reduce functionality.

• Don’t apply any of the above remedies to oscillator pins. If proper spacing between the oscillator Components & other unrelated components & traces is maintained, there shouldn’t be a need for Oscillator signal conditioning.

• Unused pins should be configured as inputs & tied directly to the microcomputer GND.

• Signals leaving the enclosure.

• Signals routing the PCB to other boards inside the enclosure

• Signals staying on the PCB with high-impedance loads (i.e., driving another MOS input or open circuit)

• Pins of parallel Input and output port designed to support high speed data transfer, e.g., between the microcomputer & an external memory, need filtering over the remaining I/O pins, because of their faster rise & fall times. When the design is complete & first prototypes are built, an hour or 2 in the screen room removing each of the filtering components one at a time, identifies which are or are not needed to get the desired EMI level.

Transmission line effect in PCB Design ?

In this tutorial we are going to learn about Transmission line effect in PCB Design ?

A transmission line is any net & its current return to GND/PWR supply. Parallel conductors can couple a signal onto each other if the signal on one conductor is a time varying signal. (A time varying signal has EM fields that can couple on the other conductor). The conductors are not physically connected, but are Electromagnetically connected, this is known as the transmission line effect. Short signal transition times & high clock rates of PCB traces need to be considered as TM lines. In this application note we look at 2 configurations of TM line.

The circuit in Fig. is an example of a single-ended TM line. The single-ended TM line is probably the commonest way to connect 2 devices. In this case a single conductor connects the source of one device to the load of another device. The reference GND plane provides the signal return path. This is an example of an unbalanced line. The signal & return lines differ in geometry — the cross-section of the signal conductor is different from that of the return GND plane conductor. The impedance value is determined by the dimensions of the trace, the value of the board dielectric constant & thickness of the dielectric.

There are several configurations of PCB microstrip:

· Surface Microstrip

· Embedded Microstrip

· Coated Micro strip

These structures are illustrated in the following diagrams. Note that in the following diagrams the signal trace is actually trapezoidal in profile & width ‘W’ refers to the trace width nearest the upper surface,

W1 reference  to the trace width nearest the lower surface. There are 2 basic configurations of micro strip, surface or exposed & embedded.

Surface Micro strip

The simplest configuration, the surface/exposed micro strip, shown in Fig, consists of a signal line, the top & sides exposed to air, on the surface of a board of dielectric constant Er & referenced to a PWR/GND plane. Surface micro strip SHOULD be implemented by etching one surface of double-sided PCB material. The diagram shows the characteristic micro strip impedance attributes:  the micro strip impedance references a single plane the impedance trace is cab be  on an outer layer.The effects of Er: The value of Er, the dielectric constant of the board material, a significant component of the value of the characteristic impedance of the line. Designers therefore sometimes just specify the value of trace impedance & rely on the board mfrs to control their processes to conform the impedance of the trace to the designer’s specification. Note that in the surface micro strip configuration the signal conductor is exposed to the air so the effective dielectric constant will be somewhere between 1 (that of air ) & about 4 (the Er of G-10 or FR-4 substrate). This will also have an effect on the signal propagation velocity. Propagation velocity reduces (from the speed of light in air) as Er increases so the surface micro strip configuration provides the highest propagation velocity. However, the trade off is that radiation from the surface micro strip is higher than from embedded types.

The equations for characteristic impedance require very complex mathematics, usually using field solving methods including boundary element analysis.

Differential transmission lines

Controlled impedance PCBs are usually produced using micro strip or strapline TM lines in single-ended (unbalanced) or differential (balanced) configurations. The differential mode of operation is shown in

Figure .

The differential configuration is used when better noise immunity & improved timing are required in critical applications. This configuration is an example of a balanced line— the signal & return paths have similar geometry. The lines are driven should be  a pair with one line transmitting a signal waveform of the opposite polarity to the other. Fields generated in the 2 lines will tend to cancel each other, so EMI & RFI will be lower than with the unbalanced line & problems with external noise are reduced.


In this tutorial we are going to learn about WHAT IS EMI & EMC IN PCB DESIGN

EMI: It is the process which gives out disruptive EM waves, transmits energy from one electronic device to another via radiated/conducted paths. In common usage, the term refers to RF signals. EMI Generally which have the frequency range commonly identified as “anything greater than DC to daylight.”
EMC: The capability of electrical/electronic systems/equipment & devices to operate in their intended
EM environment within a defined margin of safety & at design levels/performance, without suffering or causing unacceptable degradation as a result of EMI. Any source of changing voltage anywhere in the circuit will generate emissions. The greater the voltage or current amplitude within the circuit, the greater the source of emissions. The faster that a voltage changes level, the greater the potential interference. Sources of changing voltages (e.g all signal lines, clk, AC PWR lines) should change at the minimum rate that allows correct operation. These will always be present to some extent, but need limiting so that they avoid interfering with other equipment & comply with any legislative standards that may be applicable. Emissions can be classified as being broad band (blocks out a complete range of frequencies) or narrow band (blocks out selected frequencies, not others). Examples of broadband sources are un suppressed motors, relay contacts, car ignitions. The most common examples of narrow band sources are microprocessor clocks. Relays & other EM devices that use make & break contacts generate broad band noise. This can be absorbed by the addition of suppression components, such as capacitors, varistors, directly across the source. The conductors on the circuit that are not grounded will be acting as antennae, radiating RF energy. By keeping these conductors short & running them close to grounded, they become less efficient & will emit less. Power tracks must be wide (making them low impedance at HFs) in this way, they will be less likely to re-radiate interference themselves. If separate power tracks are used on different layers of a pcb, ensure that they are connected together at frequent intervals. Decoupling noise that does get onto the PWR lines by capacitors between PWR & GND is a good idea.