High frequency analogue signals

· Keep HF trace lengths as short as possible to reduce emitted radiation & pick up points.

· Route HF traces away from sensitive signal lines to avoid cross coupling. Use GND ‘guard’ traces to Provide screening for reducing HF radiation.

· Avoid using sharp corners-an important factor at RF, since 90° corners in traces act as points of high Electrical field strength & constitute an impedance discontinuity & hence a possible source of radiation.

This is generally only applicable when the frequency is in excess of 100MHz.

. If possible, route traces away from the microprocessor instead of underneath it.

. keep clock chips or clock lines away from the edges of the board.

. Place the clock circuit in the center of the board or near the connector if the clock goes off the board.

High frequency Digital signals

· Use capacitance effects of guard traces to increase logic rise & fall times & hence reduce radiatedBandwidth if possible.

· Try to avoid using sharp corners, to reduce possible radiation.

· Keep HF trace lengths like clock lines & busses as short as possible to reduce emitted radiation.

· Route High Frequency digital lines away from sensitive analog signal lines to avoid cross coupling & noise on analog lines. Keeping Noise Close to the Chip noise of the clock errors when the pin is static. Noise on the pins is coupled internal to the device through many paths that can change according to the pin function changes. Like that  the input pin in a keyboard scan has capacitive coupled noise from both the substrate & the PWR rails. Also, because it is hi-z, any ambient fields couple efficiently. If the key is pushed, the pin has a new set of noise sources because the signal line’s impedance has changed. Thus, it is difficult to effectively develop a matrix of all possibilities; therefore, the following is recommended:

• Put a 50 –100- W resistor in series with every o/p pin & 35W–50W resistor on every i/p pin. If the Hardware design calls for higher series resistance, use that value. Higher resistances are better for o/ps, but usually don’t improve characteristics of inputs. Put the resistor as close as possible to the microcomputer, overlapping the microcomputer GND if possible.

• Bypass any pin on the microcomputer to GND using a 1000-pF capacitor, provided the edge rate Used for the signal line is not faster than 100 ns. On o/ps & pins that the system uses for both I/O, GND for the capacitor should be the microcomputer GND. The second end of the capacitor should be close to the receiver side, not the microcomputer side, of the series resistor.

• When pins used for input only, place the capacitor inside, on the microcomputer side, of the resistor to reduce the loop area. Then, HF originating in the microcomputer on the pin see less impedance to GND through the capacitor than through the resistor.

• Reset & interrupt are special functions, thus care must be taken not to reduce functionality.

• Don’t apply any of the above remedies to oscillator pins. If proper spacing between the oscillator Components & other unrelated components & traces is maintained, there shouldn’t be a need for Oscillator signal conditioning.

• Unused pins should be configured as inputs & tied directly to the microcomputer GND.

• Signals leaving the enclosure.

• Signals routing the PCB to other boards inside the enclosure

• Signals staying on the PCB with high-impedance loads (i.e., driving another MOS input or open circuit)

• Pins of parallel Input and output port designed to support high speed data transfer, e.g., between the microcomputer & an external memory, need filtering over the remaining I/O pins, because of their faster rise & fall times. When the design is complete & first prototypes are built, an hour or 2 in the screen room removing each of the filtering components one at a time, identifies which are or are not needed to get the desired EMI level.

What is ringing, undershoot and overshoot in PCB Design ?

In this tutorial we are going to learn about What is ringing, undershoot and overshoot in PCB Design ?

Ringing is a signal timing related problem & can be defined as the overshoot/undershoot of a signal, a number of times following a logic level transition. Ringing is repeated overshoots & undershoots. It can occur due to several reasons such as lack of termination resistor, reflection, device rise time, line length, line impedance mismatching, discontinuities & loading.

Minimize ringing Imbalances in impedance’s generally cause undesirable effects in a circuit. When the reflection coefficients of the source & the load are of opposite polarity, the reflections alternate in polarity. The signal oscillates, about its final, steady-state value. You can reduce the ringing by making the electrical line length short compared with the rise & fall times of the waveform. You can also cut ringing by providing better matching of the source & load impedance’s to that of the transmission line. Switching large currents magnifies ringing effects. In practical terms, the magnitude of the voltage swing is the product of the current-switching rates & the inductive loading. For high-current switching, you must take great care to minimize the inductive loading. Note: If the load is highly capacitive & the signal has fast rise and fall times, signal degradation occurs because of the time required to charge & discharge the capacitance.

Undershoot is the second peak or valley past the settling voltage – the deepest valley for a rising edge & the highest peak for a falling edge. Excessive undershoot can cause false clocking or data error.

Overshoot is the first peak or valley past the settling voltage – the highest voltage for a rising edge & the lowest voltage for a falling edge. Undershoot is the next valley or peak. Protection diodes to turn on due to Excessive overshoot can cause, leading to early field failures.

Transmission line effect in PCB Design ?

In this tutorial we are going to learn about Transmission line effect in PCB Design ?

A transmission line is any net & its current return to GND/PWR supply. Parallel conductors can couple a signal onto each other if the signal on one conductor is a time varying signal. (A time varying signal has EM fields that can couple on the other conductor). The conductors are not physically connected, but are Electromagnetically connected, this is known as the transmission line effect. Short signal transition times & high clock rates of PCB traces need to be considered as TM lines. In this application note we look at 2 configurations of TM line.

The circuit in Fig. is an example of a single-ended TM line. The single-ended TM line is probably the commonest way to connect 2 devices. In this case a single conductor connects the source of one device to the load of another device. The reference GND plane provides the signal return path. This is an example of an unbalanced line. The signal & return lines differ in geometry — the cross-section of the signal conductor is different from that of the return GND plane conductor. The impedance value is determined by the dimensions of the trace, the value of the board dielectric constant & thickness of the dielectric.

There are several configurations of PCB microstrip:

· Surface Microstrip

· Embedded Microstrip

· Coated Micro strip

These structures are illustrated in the following diagrams. Note that in the following diagrams the signal trace is actually trapezoidal in profile & width ‘W’ refers to the trace width nearest the upper surface,

W1 reference  to the trace width nearest the lower surface. There are 2 basic configurations of micro strip, surface or exposed & embedded.

Surface Micro strip

The simplest configuration, the surface/exposed micro strip, shown in Fig, consists of a signal line, the top & sides exposed to air, on the surface of a board of dielectric constant Er & referenced to a PWR/GND plane. Surface micro strip SHOULD be implemented by etching one surface of double-sided PCB material. The diagram shows the characteristic micro strip impedance attributes:  the micro strip impedance references a single plane the impedance trace is cab be  on an outer layer.The effects of Er: The value of Er, the dielectric constant of the board material, a significant component of the value of the characteristic impedance of the line. Designers therefore sometimes just specify the value of trace impedance & rely on the board mfrs to control their processes to conform the impedance of the trace to the designer’s specification. Note that in the surface micro strip configuration the signal conductor is exposed to the air so the effective dielectric constant will be somewhere between 1 (that of air ) & about 4 (the Er of G-10 or FR-4 substrate). This will also have an effect on the signal propagation velocity. Propagation velocity reduces (from the speed of light in air) as Er increases so the surface micro strip configuration provides the highest propagation velocity. However, the trade off is that radiation from the surface micro strip is higher than from embedded types.

The equations for characteristic impedance require very complex mathematics, usually using field solving methods including boundary element analysis.

Differential transmission lines

Controlled impedance PCBs are usually produced using micro strip or strapline TM lines in single-ended (unbalanced) or differential (balanced) configurations. The differential mode of operation is shown in

Figure .

The differential configuration is used when better noise immunity & improved timing are required in critical applications. This configuration is an example of a balanced line— the signal & return paths have similar geometry. The lines are driven should be  a pair with one line transmitting a signal waveform of the opposite polarity to the other. Fields generated in the 2 lines will tend to cancel each other, so EMI & RFI will be lower than with the unbalanced line & problems with external noise are reduced.


In this tutorial learn about BASIC ELECTRONICS

Electronics Device – A device made from I /c material which can perform basic operation such as rectification, amplification etc.
Electronics circuit-A circuit which contains at least one electronics devices the main component.Ex-
amplifiers, oscillator, rectifier counter, multiplexer.
It is of two types:-
Analog electronic circuit-an electronic circuit which can process an analog signal that is, where input and output are analog signals is called analog electronic circuit. Ex- amplifier, rectifier etc.
Digital electronic circuit – an electronic circuit which can process a digital signal (a signal in the form of 0 and 1) is called digital electronic circuit.Ex- counter, multiplexer, decoder etc.
Mixed signal circuit: – Analog to digital and digital to analog converter are called mixed signal circuit.
Advantage of analog circuit –
Ø It can be designed to handle any amount of power.
Ø As majority of the signal are analog in nature, they can be directly processed in an analog circuit.
Application of Diodes:-

  1. Rectifier:-a circuit which convert pure AC signal into pulsating D.C.signal.
    Properties of pure A.C. signal:-
    Ø Periodic variation.
    Ø Bidirectional (above &below time axis).
    Ø Zero average value (dc. Value)/ zero dc.
    D.C. value= avg . value of wave form:-
    Ø No harmonics ( because it has only
    One frequency and so also called signal plus one signal)/non-sinusoidal
    non-periodic signal have harmonic
    Properties of pulsating D.C:-
    Ø Periodic variation.
    Ø Unidirectional ( either above or below time axis)
    Ø Non zero avg value ( non zero DC)
    Ø Contains harmonics
    · This is combination of AC& DC as it contains properties of A.C. ( periodic variation)
    and also it has property of DC ( non zero avg. value)
    · So both AC and DC component are present.
    Pulsating D.C. =A.C. component +D.C. component
  2. Regulator:- it is an electronic circuit which maintains the D.C. output voltage of a power supply stable irrespective of fluctuations in A.C. supply and variations in load current.
  3. Clipper: – A circuit which remove unwanted portion of wave form it is a wave shaping circuit .
  4. Clamper: – A circuit which adds DC to an AC waveform without changing its shape.
  5. Voltage multiplier :- A circuit which has AC input and produce a DC voltage as output which is a multiple of peak AC input .
  6. Switch :- Diode in forward bias ≡low resistance ≡on switch (R=0—ideal diode)
    Diode in reverse bias ≡ high resistance ≡off switch (R=∞ — ideal diode)


In this tutorial we are going to learn about WHAT IS  PCB TRACE ANTENA ?

A board is vulnerable to radiated interference because the pattern of traces & component leads form antennas. Common wires & PCB traces have inductance that varies between 6 & 12 nH per centimeter.

For frequencies above 100 kHz, most PCB traces are inductive–not resistive.For rule of thumb for antennas is that they begin to couple significant energy at about 1/20 of the

wavelength of the received signal. Therefore,  10 cm trace will begin to be a fairly good antenna at frequencies above 150 MHz. Remember that although a clock generator on a digital PCB may not be operate on frequency as high as 150 MHz, it approximates a square wave. Square waves will have harmonics throughout a frequency range where PCB conductors become efficient antennas.

A loop can also form an antenna. Without realizing it, most digital designers are familiar with loop antenna theory. Some designers that would never think of making a loop with a high-speed clock or reset signal, however, will turn right around & create a loop by the technique they use to layout the analog section of the board. Loop antennas constructed for loops of wire are easy to visualize. Slot antennas are harder to visualize, but just as efficient. Consider the three cases illustrated in figure:

Version “A” is a bad design. It does not utilize an analog GND plane at all. A loop is formed by the GND & signal traces. An electric field “E” & perpendicular magnetic field “H” are created, & form the basis of a loop antenna.

Version “B” is a better design, but there is intrusion into the GND plane, presumably to make room for a signal trace. A smaller slot antenna is formed by the difference in pathways between signal and return.

Version “C” is the best design. Signal & return are coincident with each other, eliminating loop antenna effects completely. Note that there are cutouts for the IC’s, but they are located away from the return path for the signal. When a PCB trace turns a corner at a 90o, a reflection can occur. This is primarily due to the change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its normal width.This upsets the transmission line characteristics, especially the distributed capacitance & self-inductance of the trace – resulting in the reflection. this is a given that not all PCB traces can be straight. Some will have to turn corners. Most CAD systems give some rounding effect on the trace – sharp 90o traces are a relic of the “tape-up” days of PCB layout. The rounding effects of CAD programs, however, still don’t maintain constant width as the trace round the corner. Next Figure shows progressively better techniques of rounding corners. Only the last example maintains constant trace width & minimizes reflections.


In this tutorial we are going to learn about WHAT IS THERMAL RELIEF & ANTI PAD ?

ANTI PAD: The area of copper etched away around a via or a PTH on a power/GND plane, thereby

preventing an electrical connection being made to that plane.

THERMAL RELIEF PAD  :   A special pattern etched around a via or a PTH to connect it into a PWR or GND plane. A thermal relief pad is necessary to prevent too much heat being absorbed into the PWR/GND plane when the board is being soldered. The width will be about 10-20 mils & gap is 20 mils (generally).


In this tutorial we are going to learn about WHAT ARE THE TWO MODE OF INTERFERENCE ?

EM disturbances can appear in the form of Common-Mode & Differential-Mode voltage & current components. Differential mode also called symmetrical noise/interference occurs when noise currents travel between live & neutral. The differential mode voltage components are measured between the phase conductors. Differential mode signals are usually used to convey the desired information & don’t usually cause that much interference as the EMI fields generated by differential currents oppose each other (180° out of phase) causing a cancellation effect.
Common mode signals, on the other hand are usually the major source of EMI from power & transmission (all I/O) cables. They cause the cables to behave as mono pole antenna. These currents flow from the phase & neutral conductors to GND. The circuit for the common mode component is completed by the stray impedance (capacitance) to GND. When solving EMI problems its important to distinguish between differential & common mode interference.
Differential mode noise where is the noise of a signal as it travels down its trace to the receiving device, then back along the return path. There is a differential voltage between the 2 wires. Make sure there is no more noise than needed to get the job done, in terms of both frequency content (rise & fall times) & the magnitude of the current.
Differential mode is desirable & common-mode is an EMI problem. The fields generated by differential currents oppose each other & nearly cancel out; therefore, little interference is caused. In common mode, a voltage travels down both the signal & return lines at the same time. There is no differential between the signal & its return. The voltage is caused by an impedance that is common to both the signal & the return. Common impedance noise where is the most common source of noise in most micro computer-based systems that are not using external memories. The common mode source adds noise to be differential mode signals. This noise is usually coupled from HF currents affecting the PCB and wiring inductance, causing the wiring to operate as a radiating mono pole antenna. These common mode signals are not useful, & are the major cause of radiated EMI from cables, PCB traces & wiring. The wiring inductance is a significant problem & must be tightly controlled. A major source of common mode noise is clocks & repetitive I/O.


In this tutorial we are going to learn about WHICH ARE MAGNETIC COMPONENTS FOR EMI & EMC REDUCTION.

  1. Inductors
    · Select inductors with a low self capacitance and series resistance.
    · Use ferrite beads to add inductance to component leads.
    · Use ferrite beads to damp out parasitic oscillations.
    · Position inductor close to high frequency noise source.
    · Use common mode chokes to reduce common mode interference.
    · Use devices that meet automotive environmental specifications.
  2. Capacitors
    · Select capacitors with a low inductance and resistance for filter networks.
    · Connect high frequency decoupling capacitors to the RF ground.
    · Position decoupling capacitors as close as possible to HF noise sources.
    · Use “high K” multi-layer disc ceramic type capacitors for decoupling, & keep lead lengths extremely short. Select capacitors with a wide frequency range.
    · Use current limiting resistors to prevent excessive Radio Frequency current from flowing in the decoupling capacitor.
    Select devices that meet automotive environmental specifications.
  3. Chokes
  4. Transformers
  5. SM Ferrite Beads


In this tutorial we are going to learn about WHAT IS PCB DESIGN TIPS ?

• Separate slit apertures in PCB layout, particularly in GND planes or near current paths.
• Areas of high impedance give rise to high EMI, so use wide tracks for power lines on the trace sides.
• Make signal tracks stripline & include GND plane & PWR plane whenever possible.
• Keep HF/RF tracks as short as possible & layout the High Frequency tracks first.
• On sensitive components & terminations, use guard ring & Ground fill wherever possible.
• In Pcb Design guard ring around trace layers reduces emission out of the board; also, connect to Ground only at a Main one point and make no other use of the guard ring.
• When you have separate power planes, keep them over a common Ground to reduce system noise andpower coupling.
• The power plane conductivity should be high, so avoid localized concentrations of via & through hole pads (surface mount is preferred mounting method).
• Track mitering (beveling of edges and corners) reduces field concentration.
• Generally make tracks run orthogonally between adjacent layers.
• Don’t loop tracks, even between layers, as this forms a receiving or radiating anten
• Floating conductor areas of pcb don’t leave, as they act as EMI radiators; if possible connect to GND plane (often, these sections are placed for thermal dissipation, so polarity shouldn’t be a consideration, but verify with component data sheet).


In this tutorial we are going to learn about WHAT IS CIRCUIT DESIGN TECHNIQUES?

  • Use the minimum clock speeds possible for logic circuitry.
  • Select the slowest switching speed logic.
  • Select the logic with the greatest noise margin.
  • Select logic families with the lowest switching energy.
  • Avoid the use of both high impedance inputs and outputs.
  • Decouple RF currents to the RF ground at inputs and outputs.
  • Protect both inputs and outputs from RF Interference.
  • Decouple any RF currents on the PCB at the I/O terminations, if possible.
  • Take care when using non-linear devices & semiconductors at inputs & outputs to avoid rectification of
    any RF signals.
  • Employ simple inductor/capacitor/resistor networks where possible to decouple Radio Frequencies.
  • Always use short connection tracks to decoupling networks to avoid adding inductance & impedance.
  • Use ferrite beads to damp out parasitic oscillations.
  • Keep all signal levels as high as possible to overcome noise thresholds. Where possible match input &
    output impedances (for HF).
  • Terminate unused inputs on devices & unused inputs on module to GND if possible