What is Design for Testability in PCB Design?

In this tutorial we are going to learn about what is parameter design for Testability in PCB Design?

Parameter for DFT

  • Placement of  components and test points should be  at least 3.2 mm (.125) from board edges (preferably 3.8 mm or .150 in)
  • In PCB design should at least two Non- plated 3.2 mm (0.125) diameter tooling holes, preferably in opposite corners, and leave 3.2 mm annular area around them free of components and test points. For this a “keying” pattern so boards can’t be inserted backwards
  • In PCB design is most important because double-sided test fixture is more expensive as compare to single sided so that tries to use all components on single side at bottom side, In PCB design try to route non-critical nets. Provide test points for clocks, control pins, programming pins, serial data and boundary scan on bottom
  • When we make the Test point then it can be through-hole leads, dedicated pads or small diameter vias, but try to avoid placing test points on surface mount lands or gold-plated edge fingers. Make sure test point should not be larger via diameters as test probe sites. Via hole size should be 0.36 mm (.014inch) or less
  • If anyone wants 100% testability, then should be providing at least one test pad for each net.
  • Try to make  two pads on nets tied to critical low impedance devices (four-wire Kelvin testing)
  • At primary power side should be at least 2-10 probe sites, and two test points each for isolated Power and grounds. At primary side ground provide many probe sites, one test point for every twenty grounds, or consider a grid of at least one per square inch
  • Provide probe sites with 1.0 mm (.040) pad diameters are preferred,  0.9 mm (.035) is acceptable, 0.8 mm (.031) can be used if tooling holes are available for alignment, but smaller diameters  will reduce contact repeatability
  • Keep space probe sites at least 2.5 mm (.100) apart, center-to-center. Generally,  0.9 mm (.035) pads spaced 1.8 mm (.070) is considered standard by many.
  • Test points should be evenly distributed over the surface of the board.
  • Keep through type components on the side that is not probed. The platen has to be cut out in places where components are over 6.4 mm (.255) tall on the probed side and  keep test points at least 5.0 mm (.200) away.
  • For components taller than 2.6 mm (.100), maintain minimum 2.0 mm (.080) clearance edge-to-edge. For all other components low height, keep test pads at least 1.0 mm (.040) from component body, edge-to-edge.
  • If Component Through-holes are used for test probe locations, make sure leads are robust enough for compressive force (be careful using LEDs or some types of transformers). Also, make sure PTH leads will be present on all versions assembly (not depopulated)
  • If PCB design is panelized, then try to provide include at least one tooling hole on each board in addition to  the tooling holes in rails

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